With the integrated circuit (IC) design and manufacturing advancing to the very deep submicron (VDSM) era, critical dimensions of the circuit components have been approximate to or even smaller than the exposure wavelengths used in the photolithography process. This will worsen the image distortion caused by the diffraction and interference of the exposure light and lead to the lack of resemblance between mask patterns and desired patterns. Such deviations between the mask patterns and the desired patterns can directly affect the performance of the resulting circuits and decrease the product yield. Currently, optical proximity correction (OPC) provides an effective approach to eliminate such deviations.
However, in existing photolithography process for transferring hole patterns onto a substrate, after a conventional OPC is performed on a layout containing hole patterns spaced by desired intervals that initially satisfy manufacturing rules, the intervals between post OPC hole patterns may be narrowed and hence exceed the minimum achievable pattern-to-pattern space of the given process, thus leading to discrepancies between pattern sizes of the layout and mask manufactured using this layout and ultimately affecting the size accuracy of patterns transferred onto the substrate.
Specifically, for instance, as shown in FIG. 1A, to achieve a circular hole 1 in a target substrate, an original pattern 2 is designed to have the shape of a square circumscribing the circle of the circular hole pattern 1 and spaced from an adjacent original pattern 2 by a distance a0. However, after it is corrected using a conventional OPC process, the post-OPC pattern 3, which can lead to the circular hole 1 in the target substrate, may assume the shape of a larger square that encompass the original pattern 2, and accordingly, the distance between the post-OPC patterns 3 is narrowed. That is, the distance a1 between the post-OPC patterns 3 is smaller than the distance a0 between the original patterns 2. This narrower distance a1 may be smaller than the minimum achievable space of a given mask fabrication process and hence cause discrepancies between the post-OPC layout patterns and the fabricated mask patterns, which will finally lead to size errors in the patterns transferred onto the substrate.
One way of addressing the above issue is to fabricate the mask by using highly advanced apparatuses to achieve better manufacturing performance. However, this approach will also lead to increase in the cost of mask fabrication. Furthermore, adjusting the OPC accuracy to assure that the distance between any two post-OPC patterns is not smaller than the minimum achievable space of a given mask fabrication process provides another solution. However, obviously, this solution will lead to decrease in the OPC accuracy and may cause the resulting patterns on the substrate fail to have sizes as desired.